Παραπομπή APA

Navabi, Z. (2006). Verilog digital system design: RT level synthesis, testbench, and verification (2nd ed.). New York: McGraw-Hill.

Παραπομπή Chicago Style

Navabi, Zainalabedin. Verilog Digital System Design: RT Level Synthesis, Testbench, and Verification. 2nd ed. New York: McGraw-Hill, 2006.

Παραπομπή MLA

Navabi, Zainalabedin. Verilog Digital System Design: RT Level Synthesis, Testbench, and Verification. 2nd ed. New York: McGraw-Hill, 2006.

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