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061106s2003 njua bi 001 0 eng |
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|a 0130449113
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| 035 |
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|l 33663
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| 040 |
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|a DLC
|b GR-PeUP
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| 082 |
0 |
0 |
|a 621.39'2 PAL
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| 100 |
1 |
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|a Palnitkar, Samir.
|
| 245 |
1 |
0 |
|a Verilog HDL :
|b A guide to digital design and synthesis /
|c Samir Palnitkar
|
| 250 |
|
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|a 2nd ed.
|
| 260 |
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|a Upper Saddle River, NJ :
|b SunSoft Press,
|c 2003
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| 300 |
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|a xlii, 450 σ. :
|b εικ. ;
|c 25 εκ. +
|e 1 CD-ROM
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| 504 |
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|a Περιέχει βιβλιογραφία και ευρετήριο
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| 650 |
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4 |
|a Verilog (Computer hardware description language)
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| 852 |
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|a INST
|b UNIPILB
|c MAIN
|e 20061106
|h 621.39'2 PAL
|p 00151280
|q 00151280
|t LOAN
|y 0
|4 1
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| 856 |
4 |
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|d /webopac/covers/02/33663_0130449113.jpg
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