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061122s2006 ne a b i 001 0 eng |
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|a 0123705975
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|l 33919
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|a DLC
|b GR-PeUP
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|a 621.39'5 VLS
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| 245 |
0 |
0 |
|a VLSI test principles and architectures :
|b design for testability /
|c edited by Laung-Terng Wang, Cheng-Wen Wu, Xiaoqing Wen.
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| 260 |
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|a Amsterdam ;
|a Boston :
|b Elsevier / Morgan Kaufmann Publishers,
|c c2006.
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| 300 |
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|a xxx, 777 σ. :
|b εικ. ;
|c 25 εκ.
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| 490 |
1 |
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|a The Morgan Kaufmann Series in Systems on Silicon ;
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| 504 |
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|a Περιέχει βιβλιογραφία και ευρετήριο
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| 650 |
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4 |
|a Integrated circuits
|x Very large scale integration
|x Testing.
|
| 650 |
|
4 |
|a Integrated circuits
|x Very large scale integration
|x Design.
|
| 700 |
1 |
|
|a Wang, Laung-Terng.
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| 700 |
1 |
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|a Wu, Cheng-Wen,
|c EE Ph. D.
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| 700 |
1 |
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|a Wen, Xiaoqing.
|
| 830 |
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|a The Morgan Kaufmann series in systems on silicon.
|
| 852 |
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|a INST
|b UNIPILB
|c MAIN
|e 20061122
|h 621.39'5 VLS
|p 00151525
|q 00151525
|t LOAN
|y 0
|4 1
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| 856 |
4 |
1 |
|3 Πίνακας περιεχομένων :
|u http://www.loc.gov/catdir/toc/ecip069/2006006869.html
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| 856 |
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|d /webopac/covers/02/33919_0123705975.jpg
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