On-chip communication architectures : system on chip interconnect /
Over the past decade, system-on-chip (SoC) designs have evolved to address the ever increasing complexity of applications, fueled by the era of digital convergence. Improvements in process technology have effectively shrunk board-level components so they can be integrated on a single chip. New on-ch...
Κύριος συγγραφέας: | Pasricha, Sudeep. |
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Άλλοι συγγραφείς: | Dutt, Nikil. |
Μορφή: | Βιβλίο |
Γλώσσα: | English |
Στοιχεία έκδοσης: |
Amsterdam ; Boston :
Elsevier / Morgan Kaufmann Publishers,
c2008.
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Θέματα: | |
Διαθέσιμο Online: |
http://www.sciencedirect.com/science/book/9780123738929 |
Ετικέτες: |
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008 | 090917s2008 ne 001 0 eng | ||
020 | |a 9780123738929 | ||
020 | |a 012373892X | ||
020 | |a 9780080558288 (electronic bk.) | ||
020 | |a 0080558283 (electronic bk.) | ||
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100 | 1 | |a Pasricha, Sudeep. | |
245 | 1 | 0 | |a On-chip communication architectures : |b system on chip interconnect / |c Sudeep Pasricha, Nikil Dutt. |
260 | |a Amsterdam ; |a Boston : |b Elsevier / Morgan Kaufmann Publishers, |c c2008. | ||
300 | |a 1 online resource (xvii, 522 p.) : |b ill. | ||
500 | |a Διαθέσιμο και σε ηλεκτρονικό βιβλίο, τρόπος πρόσβσσης μέσω διαδικτύου. | ||
520 | |a Over the past decade, system-on-chip (SoC) designs have evolved to address the ever increasing complexity of applications, fueled by the era of digital convergence. Improvements in process technology have effectively shrunk board-level components so they can be integrated on a single chip. New on-chip communication architectures have been designed to support all inter-component communication in a SoC design. These communication architecture fabrics have a critical impact on the power consumption, performance, cost and design cycle time of modern SoC designs. As application complexity strains the communication backbone of SoC designs, academic and industrial R & D efforts and dollars are increasingly focused on communication architecture design. This book is a comprehensive reference on concepts, research and trends in on-chip communication architecture design. It will provide readers with a comprehensive survey, not available elsewhere, of all current standards for on-chip communication architectures. KEY FEATURES * A definitive guide to on-chip communication architectures, explaining key concepts, surveying research efforts and predicting future trends * Detailed analysis of all popular standards for on-chip communication architectures * Comprehensive survey of all research on communication architectures, covering a wide range of topics relevant to this area, spanning the past several years, and up to date with the most current research efforts * Future trends that with have a significant impact on research and design of communication architectures over the next several years. | ||
505 | 0 | |a An Overview of System-on-Chips; Need for Communication-centric Design Flow; Basic Concepts of Bus-based Communication Architectures; Bus-based Communication Architecture Specification Standards; Limitations of Current Design Approaches; Physical and Electrical Analysis; Models for Performance Exploration; Power/Energy Exploration; Design and Synthesis of Communication Architectures; Innovative Aspects; Dynamic Bus Reconfiguration; Bus Encoding Techniques; Interface Synthesis and Optimization; Secure On-chip Communication Infrastructure; Verification; Custom Bus Design; Open Problems; Network-on-Chips; Optical Interconnects; Wireless Interconnects; Physical Design Trends. | |
504 | |a Includes bibliographical references and index. | ||
650 | 4 | |a Systems on a chip. | |
650 | 4 | |a Microcomputers |x Buses. | |
650 | 4 | |a Computer architecture. | |
650 | 4 | |a Interconnects (Integrated circuit technology) | |
655 | 4 | |a Electronic books. | |
700 | 1 | |a Dutt, Nikil. | |
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